Microchip
16C5X Instruction Set Tables

Instruction general structure:

Type 1 (most) :
Bit : 11 10 9 8 7 6 5 4 3 2 1 0
Coding : opcode (6 bits) d f (5 bits) 

Where : d range : (0 -  1 dec) ( 1 bit  )  
        f range : (0 - 31 dec) ( 5 bits )

Type 2 (ANDLW, CALL, IORLW, MOVLW, RETLW, XORLW) :
Bit : 11 10 9 8 7 6 5 4 3 2 1 0
Coding : opcode (4 bits) k(8 bits) 

Where : k range : (0 - 255 dec) ( 8 bits )

Type 3 (CLRW, CLRWDT, NOP, OPTION, SLEEP) :
Bit : 11 10 9 8 7 6 5 4 3 2 1 0
Coding : opcode (12 bits)

Type 4 (BCF, BSF, BTFSC, BTFSS) :
Bit : 11 10 9 8 7 6 5 4 3 2 1 0
Coding : opcode (4 bits) b (3 bits) f (5 bits)

Instruction Set Summary:

Instruction Syntax Operation Encoding Words Cycles Flags
ADDWF ADDWF f,d (W + f) → d 0001 11df ffff 1 1 C,DC,Z
ANDLW ANDLW k (W .AND. k) → W 1110 kkkk kkkk 1 1 Z
ANDWF ANDWF f,d (W .AND. f) → d 0001 01df ffff 1 1 Z
BCF BCF f,b 0 → f(b) 0100 bbbf ffff 1 1 None
BSF BSF f,b 1 → f(b) 0101 bbbf ffff 1 1 None
BTFSC BTFSC f,b skip if bit(b) in file(f) is clear 0110 bbbf ffff 1 1(2) None
BTFSS BTFSS f,b skip if bit(b) in file(f) is set 0111 bbbf ffff 1 1(2) None
CALL CALL k PC + 1 → Stack, k → PC 1001 kkkk kkkk 1 2 None
CLRF CLRF f 00h → f 0000 011f ffff 1 1 Z
CLRW CLRW 00h → W 0000 0100 0000 1 1 Z
CLRWDT CLRWDT 00h → WDT, 0 → WDT prescaler 0000 0000 0100 1 1 1 → TO, 1 → PD
COMF COMF f,d neg(f) → d 0010 01df ffff 1 1 Z
DECF DECF f,d (f - 1) → d 0000 11df ffff 1 1 Z
DECFSZ DECFSZ f,d (f - 1) → d, skip if result = 0 0010 11df ffff 1 1(2) None
GOTO GOTO k k → PC ( 9 bits ) 101k kkkk kkkk 1 2 None
INCF INCF f,d (f + 1) → d 0010 10df ffff 1 1 Z
INCFSZ INCFSZ f,d (f + 1) → d, skip if result = 0 0011 11df ffff 1 1(2) None
IORLW IORLW k (W .OR. k) → W 1101 kkkk kkkk 1 1 Z
IORWF IORWF f,d (f .OR. W) → d 0001 00df ffff 1 1 Z
MOVF MOVF f,d (f) → d 0010 00df ffff 1 1 Z
MOVLW MOVLW k k → W 1100 kkkk kkkk 1 1 None
MOVWF MOVWF f W → f 0000 001f ffff 1 1 None
NOP NOP No operation 0000 0000 0000 1 1 None
OPTION OPTION W → OPTION 0000 0000 0010 1 1 None
RETLW RETLW k k → W, Stack → PC 1000 kkkk kkkk 1 2 None
RLF RLF f,d f(n) → d(n+1), C → d(0), f(7) → C 0011 01df ffff 1 1 C
RRF RRF f,d f(n) → d(n-1), C → d(7), f(0) → C 0011 00df ffff 1 1 C
SLEEP SLEEP 0→PD, 1→TO, 00h→WDT, 0→WDT prescaler 0000 0000 0011 1 1 TO, PD
SUBWF SUBWF f,d (f - W) → d 0000 10df ffff 1 1 C,DC,Z
SWAPF SWAPF f,d f<0:3> → d<4:7>, f<4:7> → d<0:3> 0000 10df ffff 1 1 None
TRIS TRIS f W → TRIS register f 0000 0000 0fff 1 1 None
XORLW XORLW k (W .XOR. k) → W 1111 kkkk kkkk 1 1 Z
XORWF XORWF f,d (W .XOR. f) → d 0001 10df ffff 1 1 Z

Status Word Flags (Memory Location 03h)
Bit Flag Description
0 C Carry
1 DC Digit Carry/Borrow
2 Z Zero
3 PD Power Down
4 TO Time Out

(d) field values:
d destination
0 W
1 f

Back